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jultrishyyy
194
resource_usage.py
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194
resource_usage.py
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import json
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import subprocess
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import os
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import re
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def extract_module_name(verilog_code):
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"""
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Extract the module name from the Verilog code.
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Assumes the module declaration is of the form:
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module <module_name> (
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Returns the module name as a string, or None if not found.
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"""
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match = re.search(r'\bmodule\s+(\w+)', verilog_code)
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if match:
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return match.group(1)
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return None
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def parse_optimized(lines):
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"""
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Extract resource usage numbers from the main (optimized) report sections.
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Returns a dictionary with keys: LUT, FF, DSP, BRAM, IO.
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"""
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optimized = {"LUT": None, "FF": None, "DSP": None, "BRAM": None, "IO": None}
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for line in lines:
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m = re.search(r'\|\s*Slice LUTs\*?\s*\|\s*(\d+)', line)
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if m:
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optimized["LUT"] = int(m.group(1))
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m = re.search(r'\|\s*Slice Registers\s*\|\s*(\d+)', line)
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if m:
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optimized["FF"] = int(m.group(1))
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m = re.search(r'\|\s*DSPs\s*\|\s*(\d+)', line)
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if m:
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optimized["DSP"] = int(m.group(1))
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m = re.search(r'\|\s*Block RAM Tile\s*\|\s*(\d+)', line)
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if m:
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optimized["BRAM"] = int(m.group(1))
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m = re.search(r'\|\s*Bonded IOB\s*\|\s*(\d+)', line)
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if m:
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optimized["IO"] = int(m.group(1))
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return optimized
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def extract_primitives_section(lines):
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"""
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Extracts all lines between the "7. Primitives" header and the "8. Black Boxes" header.
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"""
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start_marker = "7. Primitives"
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end_marker = "8. Black Boxes"
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start_idx = None
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end_idx = None
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for idx, line in enumerate(lines):
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if start_idx is None and start_marker in line and (idx + 1 < len(lines) and "------" in lines[idx + 1]):
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start_idx = idx
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elif start_idx is not None and end_marker in line and (idx + 1 < len(lines) and "------" in lines[idx + 1]):
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end_idx = idx
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break
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if start_idx is None or end_idx is None:
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return []
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return lines[start_idx:end_idx]
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def parse_primitives_section(lines):
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"""
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Parses the primitives section lines to accumulate resource usage.
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Returns a dictionary with keys: LUT, FF, DSP, BRAM, IO.
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In this example:
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- For LUT: sums up any primitive whose name starts with "LUT" (e.g., LUT2, LUT3, ...)
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- For IO: sums the usage of IBUF and OBUF.
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"""
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resources = {"LUT": 0, "FF": 0, "DSP": 0, "BRAM": 0, "IO": 0}
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for line in lines:
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stripped_line = line.strip()
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if not stripped_line.startswith("|"):
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continue
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parts = stripped_line.split("|")
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if len(parts) < 4:
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continue
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ref_name = parts[1].strip()
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used_str = parts[2].strip()
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try:
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used = int(used_str)
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except ValueError:
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continue
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if ref_name.startswith("LUT"):
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resources["LUT"] += used
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if ref_name in ("IBUF", "OBUF"):
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resources["IO"] += used
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# (Add additional processing for FF, DSP, BRAM if necessary.)
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return resources
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def run_synthesis(solution_code):
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"""
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Writes the given Verilog solution to a temporary file,
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creates a Tcl script for Vivado to run synthesis and generate a utilization report,
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runs Vivado in batch mode, and parses the resource usage report.
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Returns a dictionary with keys "optimized" and "primitives" containing resource usage.
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"""
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# Write the Verilog code to a temporary file.
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verilog_file = "temp.v"
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with open(verilog_file, "w") as f:
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f.write(solution_code)
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# Extract the module name from the solution code.
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top_module = extract_module_name(solution_code)
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print(top_module)
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if top_module is None:
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print("Could not extract module name; using 'temp_top' as a default.")
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top_module = "temp_top"
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vivado_project = "temp_project"
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tcl_script = "synthesis_script.tcl"
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# Get the Vivado installation path from the environment variable.
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vivado_path_env = os.environ.get("vivado")
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if vivado_path_env is None:
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print("Error: 'vivado' environment variable is not set.")
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return None
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vivado_path = os.path.join(vivado_path_env, "vivado.bat")
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# Create the Vivado Tcl script.
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tcl_commands = f"""
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create_project {vivado_project} -force -part xc7z020clg400-1
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add_files {verilog_file}
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set_property top {top_module} [current_fileset]
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# Run synthesis only (no simulation)
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synth_design -top {top_module}
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# Generate resource utilization report
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report_utilization -file resource_usage.rpt
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quit
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"""
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with open(tcl_script, "w") as file:
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file.write(tcl_commands)
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# Run Vivado in batch mode using the generated Tcl script.
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try:
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result = subprocess.run(
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[vivado_path, "-mode", "batch", "-source", tcl_script],
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capture_output=True, text=True, check=True
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)
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except subprocess.CalledProcessError as e:
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print("Synthesis failed:", e)
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return None
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print(result.stdout)
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# Check for the success message in the output.
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if "Finished Writing Synthesis Report" in result.stdout:
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# Read the resource utilization report.
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with open("resource_usage.rpt", "r") as f:
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report_lines = f.readlines()
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optimized_resources = parse_optimized(report_lines)
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primitives_section = extract_primitives_section(report_lines)
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primitives_resources = (parse_primitives_section(primitives_section)
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if primitives_section else {})
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return {"optimized": optimized_resources, "primitives": primitives_resources}
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else:
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print("Synthesis did not complete successfully.")
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return None
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def run_resource_usage():
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# Load the original JSON.
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input_json_file = "solutions.json" # Update this file name if needed.
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with open(input_json_file, "r") as f:
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data = json.load(f)
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# Traverse all top-level keys (e.g., "4o") and all subcategories.
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for top_key, top_value in data.items():
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# print(top_value.keys())
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# exit()
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# top_value should be a dict with categories (e.g., "Combinational Logic", "Finite State Machines", etc.)
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for category, module_list in top_value.items():
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# if category == "Combinational Logic":
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# continue
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for module in module_list:
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for sol in module["solutions"]:
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if sol.get("pass", "").strip().lower() == "true":
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solution_code = sol["solution"]
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print(f"Running synthesis for module '{module['module']}' in category '{category}'")
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resource_usage = run_synthesis(solution_code)
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if resource_usage:
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sol["resource usage"] = resource_usage
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else:
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sol["resource usage"] = {"optimized": {}, "primitives": {}}
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else:
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sol["resource usage"] = {"optimized": {}, "primitives": {}}
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# Write the updated JSON (with resource usage added) to a new file.
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output_json_file = "solutions.json"
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with open(output_json_file, "w") as f:
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json.dump(data, f, indent=4)
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print(f"Updated JSON written to {output_json_file}")
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